Analysis and Research on the correlation circuit o

2022-08-02
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Analysis and Research on related circuits of UHF Passive RFID tag

UHF Passive RFID tag refers to an RFID tag that operates in the ultra-high frequency band between 300m and 3GHz without external power supply. Because of its high working frequency, long read-write distance, no external power supply and low manufacturing cost, this UHF Passive RFID tag has become one of the key directions of RFID research and may become the mainstream product in the RFID field in the near future

many international research institutions have made some outstanding achievements in the research of UHF band RFID tags. For example, ATMEL published on jssc that the minimum RF input power can be as low as 16.7 μ W's UHF Passive RFID tag. Because of its ultra-low input power, this article has become a classic article on RFID tag design and has been cited many times. In 2005, jssc published a model designed by the Swiss Federal Institute of technology with a minimum input power of only 2.7 μ W. 2.45G RFID tag chip with a reading and writing distance of 12m. In terms of ultra-small and ultra-thin RFID tag design, Hitachi Japan proposed at the 2006 ISSCC conference that the area is only 0.15mm, which is also a qualified supplier for Airbus, COMAC, AVIC and Bombardier × 0.15mm, the chip thickness is only five μ M RFID tag chip. At present, there is still a big gap between the domestic research in the field of RFID tags and the top scientific research achievements abroad, which requires the redoubled efforts of domestic researchers

as shown in Figure 1, a complete UHF Passive RFID tag consists of an antenna and a tag chip. The tag chip generally includes the following circuits: power recovery circuit, power regulator circuit, backscatter modulation circuit, demodulation circuit, clock extraction/generation circuit, start signal generation circuit, reference source generation circuit, control unit and memory

the energy required for the passive RFID tag chip to work completely comes from the energy of the electromagnetic wave generated by the card reader. Therefore, the power recovery circuit needs to convert the UHF signal induced by the tag antenna into the DC voltage required for the chip to provide energy for the chip

Part 2 of this paper will introduce the design of power recovery circuit. At present, the electronic universal testing machine of Jinan new era Testing Instrument Co., Ltd. has the following three performance characteristics: the electromagnetic environment is very complex, and the power of the input signal can change hundreds or even thousands of times. Therefore, in order for the chip to work normally in different field strengths, a reliable power supply voltage stabilizing circuit must be designed. The third part of this paper will explain the design of power supply voltage stabilizing circuit. The modulation and demodulation circuit is the key circuit for the communication between the tag and the card reader. At present, most UHF RFID tags use ASK modulation. This paper introduces the modulation and demodulation in part 4. The control unit of RFID tag is a digital circuit that processes instructions. In order to make the digital circuit reset correctly after the tag enters the card reader field to respond to the instructions of the card reader, a reliable start signal generation circuit must be designed to provide the reset signal of the digital unit. In part 5, this paper will discuss the design of the starting signal generation circuit

power recovery circuit

the power recovery circuit converts the UHF signal received by the RFID tag antenna into DC voltage through rectification, boost and other methods to provide energy for the chip. The power recovery circuit has many feasible circuit structures. As shown in Figure 2, there are several commonly used power recovery circuits

among these power recovery circuits, there is no ideal circuit structure, and each circuit has its own advantages and disadvantages. Under different load conditions, different input voltage conditions, different output voltage requirements and available process conditions, different circuits need to be selected to achieve the optimal performance. The multistage diode voltage doubling circuit shown in Figure 2 (a) generally adopts Schottky barrier diodes. It has the advantages of high voltage doubling efficiency and small input signal amplitude, and is widely used. However, Schottky barrier diodes are not provided by the common CMOS process of general manufacturers, which will bring trouble to designers in the selection of process. Figure 2 (b) shows that the Schottky diode is replaced by a PMOS tube connected in the form of a diode, avoiding the special requirements on the process. The voltage doubling circuit with this structure needs to have higher input signal amplitude and better voltage doubling efficiency when the output voltage is high. Figure 2 (c) shows the traditional diode full wave rectifier circuit. Compared with the DIC specific KSON voltage doubling circuit, the voltage doubling effect is better, but more diode elements are introduced, and the power conversion efficiency is generally slightly lower than the Dickson voltage doubling circuit. In addition, since the antenna input end is separated from the chip ground, it is a fully symmetrical structure with straight capacitance when viewed from the antenna input end to the chip, which avoids the interaction between the chip ground and the antenna, and is suitable for connecting with a symmetrical antenna (such as a dipole antenna). Figure 2 (d) is a CMOS transistor solution for full wave rectifier circuit proposed in many literatures. In the case of process constraints, better power conversion efficiency can be obtained, and the requirements for input signal amplitude are relatively low

in the application of general passive UHF RFID tags, the chip circuit is expected to be suitable for the manufacturing of common CMOS process for the sake of cost. The requirement of long-distance reading and writing puts forward higher requirements for the power conversion efficiency of the power recovery circuit. For this reason, many designers use standard CMOS technology to realize Schottky barrier diodes, so that multi-level Dickson voltage doubling circuit structure can be conveniently used to improve the performance of power conversion. Figure 3 shows the structure diagram of Schottky diode manufactured by common CMOS process. In the design, Schottky diodes can be fabricated without changing the process steps and mask generation rules, just making some modifications in the layout

Figure 4 shows the layout of several Schottky diodes designed under UMC 0.18um CMOS process. Their DC characteristic test curves are shown in Figure 5. From the test results of DC characteristics, it can be seen that Schottky diodes manufactured by standard CMOS process have typical diode characteristics, and the opening voltage is only about 0.2V, which is very suitable for RFID tags

power supply voltage stabilizing circuit

when the input signal amplitude is high, the power supply voltage stabilizing circuit must ensure that the output DC power supply voltage does not exceed the maximum voltage that the chip can withstand; At the same time, when the input signal is small, the power consumed by the voltage stabilizing circuit should be as small as possible to reduce the total power consumption of the chip

from the perspective of voltage stabilizing principle, the structure of voltage stabilizing circuit can be divided into parallel voltage stabilizing circuit and series voltage stabilizing circuit. The basic principle of the parallel voltage stabilizing circuit is shown in Figure 6

in the RFID tag chip, an energy storage capacitor with a large capacitance value is required to store enough charge so that the tag can still maintain the power supply voltage of the chip when the input energy is small (for example, when there is no carrier wave in ook modulation) when receiving the modulated signal. If the input energy is too high and the power supply voltage rises to a certain extent, the voltage sensor in the voltage stabilizing circuit will control the discharge source to release the excess charge on the energy storage capacitor, so as to achieve the purpose of voltage stabilization. Figure 7 shows one of the parallel voltage stabilizing circuits. Three diodes D1, D2, D3 in series and resistor R1 form a voltage sensor to control the grid voltage of drain tube M1. When the power supply voltage exceeds the sum of the opening voltages of the three diodes, the M1 grid voltage rises, M1 turns on, and starts discharging the energy storage capacitor C1

the principle of the other type of voltage stabilizing circuit is the series voltage stabilizing scheme. Its schematic diagram is shown in Figure 8. The reference voltage source is designed as a reference source independent of the supply voltage. The output power supply voltage is divided by resistance and compared with the reference voltage. The difference is amplified by the operational amplifier to control the grid potential of the M1 tube, so that the output voltage and the reference source basically maintain the same stable state

this series voltage stabilizing circuit can output more accurate power supply voltage. However, since M1 tube is connected in series between the unregulated power supply and the regulated power supply, the voltage drop on M1 tube will cause higher power loss when the load current is large. Therefore, this circuit structure is generally used in label circuits with low power consumption

modulation and demodulation circuit

a. demodulation circuit

in order to reduce chip area and power consumption, most passive RFID tags currently use ASK modulation. For the ask demodulation circuit of the tag chip, the commonly used demodulation method is envelope detection, as shown in Figure 9

the voltage doubling circuit of the envelope detection part is basically the same as that of the power recovery part, but it is not necessary to provide a large load current. A leakage current source is connected in parallel at the last stage of the envelope detection circuit. When the input signal is modulated, the input energy decreases, and the leakage source reduces the envelope output voltage, so that the later comparator circuit can judge the modulated signal. Because the energy of the input RF signal varies widely, the current of the discharge source must be dynamically adjusted to adapt to the changes of different field strengths in the near and far fields. For example, if the current of the discharge power supply is small, it can meet the needs of the comparator when the field strength is weak. However, when the tag is in the near field with strong field strength, the discharged current will not be enough to cause a large amplitude change in the detected signal, and the subsequent comparator cannot work normally. To solve this problem, the discharge source structure shown in Figure 10 can be adopted

when the input carrier is not modulated, the gate potential of the drain tube M1 is the same as the drain potential, forming a diode connected NMOS tube, clamping the envelope output near the threshold voltage of M1. At this time, the input power is balanced with the power consumed on M1; When the input carrier is modulated, the input energy of the chip decreases. At this time, due to the action of the delay circuits R1 and C1, the gate potential of M1 remains at the original level, and the discharged current on M1 remains unchanged, which makes the envelope output signal amplitude rapidly reduce; Similarly, after the carrier recovery, the delay of R1 and C1 enables the envelope output to quickly return to the original high level. By adopting this circuit structure and reasonably selecting the sizes of R1, C1 and M1, the needs of demodulation under different field strengths can be met. The comparator circuit connected behind the envelope output also has a variety of options, such as hysteresis comparator, operational amplifier, etc. It can also be simplified to be realized by inverter

b. modulation circuit

passive UHF RFID tags generally adopt the modulation method of back scattering, that is, by changing the input impedance of the chip to change the reflection coefficient between the chip and the antenna, so as to achieve the purpose of modulation. Generally, the antenna impedance and chip input impedance are designed to match the power when they are not modulated, and the reflection coefficient increases when they are modulated. The common backscatter method is to connect a capacitor connected with a switch in parallel between the two input terminals of the antenna. As shown in Figure 11, the modulation signal determines whether the capacitor is connected to the chip input terminal by controlling the opening of the switch, thus changing the input impedance of the chip

startup signal generation circuit

the function of power startup reset signal generation circuit in RFID tag is to provide reset signal for the startup of digital circuit after the power is restored. Its design must consider the following points

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